|
|
s8 | slot_submit_count_irq [BASE_JM_MAX_NR_SLOTS] |
| |
|
u32 | hw_quirks_sc |
| |
|
u32 | hw_quirks_tiler |
| |
|
u32 | hw_quirks_mmu |
| |
|
u32 | hw_quirks_jm |
| |
|
struct list_head | entry |
| |
|
struct device * | dev |
| |
|
struct miscdevice | mdev |
| |
|
u64 | reg_start |
| |
|
size_t | reg_size |
| |
|
void __iomem * | reg |
| |
|
void __iomem * | crgreg |
| |
|
void __iomem * | pmctrlreg |
| |
|
void __iomem * | pctrlreg |
| |
|
struct { |
|
int irq |
| |
|
int flags |
| |
| } | irqs [3] |
| |
|
struct clk * | clock |
| |
|
char | devname [DEVNAME_SIZE] |
| |
|
struct kbase_pm_device_data | pm |
| |
|
struct kbasep_js_device_data | js_data |
| |
|
struct kbase_mem_pool | mem_pool |
| |
|
struct kbasep_mem_device | memdev |
| |
|
struct kbase_mmu_mode const * | mmu_mode |
| |
|
struct kbase_as | as [BASE_MAX_NR_AS] |
| |
|
spinlock_t | mmu_mask_change |
| |
|
struct kbase_gpu_props | gpu_props |
| |
| unsigned long | hw_issues_mask [(BASE_HW_ISSUE_END+BITS_PER_LONG - 1)/BITS_PER_LONG] |
| |
| unsigned long | hw_features_mask [(BASE_HW_FEATURE_END+BITS_PER_LONG - 1)/BITS_PER_LONG] |
| |
| unsigned long | hi_features_mask [2] |
| |
|
u64 | shader_inuse_bitmap |
| |
|
u32 | shader_inuse_cnt [64] |
| |
|
u64 | shader_needed_bitmap |
| |
|
u32 | shader_needed_cnt [64] |
| |
|
u32 | tiler_inuse_cnt |
| |
|
u32 | tiler_needed_cnt |
| |
|
struct { |
|
atomic_t count |
| |
|
atomic_t state |
| |
| } | disjoint_event |
| |
|
u32 | l2_users_count |
| |
|
u64 | shader_available_bitmap |
| |
|
u64 | tiler_available_bitmap |
| |
|
u64 | l2_available_bitmap |
| |
|
u64 | stack_available_bitmap |
| |
|
u64 | shader_ready_bitmap |
| |
|
u64 | shader_transitioning_bitmap |
| |
| s8 | nr_hw_address_spaces |
| |
| s8 | nr_user_address_spaces |
| |
|
struct kbase_device::kbase_hwcnt | hwcnt |
| |
|
struct kbase_vinstr_context * | vinstr_ctx |
| |
|
atomic_t | irq_throttle_cycles |
| |
|
u32 | reset_timeout_ms |
| |
|
struct mutex | cacheclean_lock |
| |
|
void * | platform_context |
| |
|
struct list_head | kctx_list |
| |
|
struct mutex | kctx_list_lock |
| |
|
bool | job_fault_debug |
| |
|
struct proc_dir_entry * | proc_gpu_memory_dentry |
| |
|
u32 | kbase_profiling_controls [FBDUMP_CONTROL_MAX] |
| |
|
struct clk * | clk |
| |
|
int | force_replay_limit |
| |
|
int | force_replay_count |
| |
|
base_jd_core_req | force_replay_core_req |
| |
|
bool | force_replay_random |
| |
|
atomic_t | ctx_num |
| |
|
u32 | gpu_outstanding |
| |
|
struct kbase_hwaccess_data | hwaccess |
| |
|
atomic_t | faults_pending |
| |
|
bool | poweroff_pending |
| |
|
bool | infinite_cache_active_default |
| |
|
size_t | mem_pool_max_size_default |
| |
|
u32 | current_gpu_coherency_mode |
| |
|
u32 | system_coherency |
| |
|
bool | cci_snoop_enabled |
| |
|
u32 | snoop_enable_smc |
| |
|
u32 | snoop_disable_smc |
| |
|
struct kbase_protected_ops * | protected_ops |
| |
|
bool | protected_mode |
| |
|
bool | protected_mode_transition |
| |
|
bool | protected_mode_support |
| |
|
bool | irq_reset_flush |
| |
|
u32 | inited_subsys |
| |
|
spinlock_t | hwaccess_lock |
| |
|
struct mutex | mmu_hw_mutex |
| |
|
u8 | serialize_jobs |
| |
|
u32 | gpu_vid |
| |
◆ hi_features_mask
| unsigned long kbase_device::hi_features_mask[2] |
◆ hw_features_mask
| unsigned long kbase_device::hw_features_mask[(BASE_HW_FEATURE_END+BITS_PER_LONG - 1)/BITS_PER_LONG] |
List of features available
◆ hw_issues_mask
| unsigned long kbase_device::hw_issues_mask[(BASE_HW_ISSUE_END+BITS_PER_LONG - 1)/BITS_PER_LONG] |
List of SW workarounds for HW issues
◆ nr_hw_address_spaces
| s8 kbase_device::nr_hw_address_spaces |
Number of address spaces in the GPU (constant after driver initialisation)
◆ nr_user_address_spaces
| s8 kbase_device::nr_user_address_spaces |
Number of address spaces available to user contexts
The documentation for this struct was generated from the following file:
